Job Description
The ECE Department at NUS is seeking a Senior Research Fellow. An experienced and highly motivated researcher to lead and contribute to wafer process module on advanced patterning, involving lithography, dry and wet etching. Knowledge and experiences on the integration of Cu interconnect and hybrid bonding is a plus.
The successful candidate will play a dual role: spearheading the development of on in 2.5D, 3D, chiplet, and heterogeneous integration programs to innovate and validate next generation leadership system scaling technologies
This position also offers a unique opportunity to work closely with leading process tool vendors, academic researchers and industrial partners, to conduct cutting-edge research in key process module and integration, to resolve the bottleneck issues of the state-of-the-art packaging technologies.
Responsibilities will involve:
1. Addressing key issues of the SOTA technologies.
Technology challenges associated with wafer processing and advanced packaging, with the aim of improving process capability, integration performance, reliability, and scalability.
2. CoW and WoW Hybrid Bonding Technology Development
Conduct research and development in CoW and WoW hybrid bonding technologies.
And key process modules and integration approaches required to enable advanced 2.5D/3D and heterogeneous integration.
3. Next Generations Heterogeneous Integration Technology Development
Develop innovative process and integration solutions for next-generation heterogeneous integration.
Supporting advanced 2.5D/3D packaging, chiplet integration, and emerging system integration technologies.
4. Innovation & Intellectual Property
Contribute to invention disclosures, patent filings, and technology commercialization activities.
Publish research outcomes in high-impact journals and present at leading semiconductor and packaging conferences.
5. Leadership
Lead a critical module team to enable leadership system integration technology for 2.5D and 3D/hybrid bonding systems.
Expanded Project Management: Acting as the primary technical interface and taking full ownership of deliverables.
Job Requirements
• Reporting to PI Prof Yu Chen-Hua.
• Ph.D. or equivalent degree in Electrical, Electronics, Mechanical, Chemical Engineering, Physics, Material Science or its equivalent from a reputable University/Institute is preferred.
• 15+ years of industrial R&D, or advanced research and development experience in wafer foundry process and semiconductor packaging.
• Candidate with profound experience in Silicon photonics integration including CPO and FAU.
• And proven outstanding industry achievements in both wafer technology and advanced 2.5D/3D packaging technologies will have advantage.
• Proficiency in data analysis and interpretation using statistical tools and software packages.
• Excellent communication skills and the ability to work effectively in a collaborative research environment.
• Motivated and possesses effective communication skills including writing and presenting.
• Ability to present complex technical concepts to multidisciplinary audiences.
• Open to Fixed Term Contract.