Job Description

The Research Fellow will drive the development of atomic-layer-deposited (ALD) oxide semiconductor (OS) thin-film transistors and aggressively scaled short-channel OS devices for back-end-of-line (BEOL) integration with CMOS. Key responsibilities include:
•    Develop and optimize ALD processes for oxide semiconductor channel materials (e.g., IGZO, ITO, IZO) and BEOL-compatible gate dielectrics, including recipe development, precursor evaluation, and post-deposition treatments.
•    Design, fabricate, and characterize short-channel OS transistors targeting sub-100 nm channel lengths, with emphasis on contact engineering, access resistance reduction, and threshold voltage control.
•    Execute full process flows in the NUS cleanroom, including lithography, etch, deposition, and metallization; develop BEOL-compatible integration modules.
•    Perform electrical characterization (DC, pulsed I–V, low-frequency noise, TDDB/BTI reliability) and correlate device performance with process conditions and materials properties.
•    Prepare manuscripts for top-tier venues (IEDM, VLSI, Nature journals) and present results at international conferences.
•    Mentor graduate and undergraduate students, and assist with grant reporting and proposal preparation.

Qualifications

Essential:
•    PhD in Electrical Engineering, Materials Science, Applied Physics, Chemical Engineering, or a closely related field.
•    Hands-on cleanroom fabrication experience with thin-film transistors or advanced CMOS/BEOL process modules.
•    Demonstrated expertise in ALD process development, including familiarity with thermal and plasma-enhanced ALD tools, precursor chemistry, and in-situ/ex-situ film characterization.
•    Strong background in semiconductor device physics, transistor electrostatics, and short-channel effects.
•    Proficiency in electrical characterization of transistors (transfer/output curves, mobility extraction, subthreshold analysis, reliability testing).
•    Track record of first-author publications in reputable device/materials venues.
•    Ability to work independently and collaboratively in a multi-disciplinary team.
•    Open to fixed-term contract
Desirable:
•    Direct experience with oxide semiconductor (IGZO / ITO / IZO / CAAC-IGZO) device fabrication or ALD.
•    Experience with TCAD simulation (Sentaurus, Silvaco) or compact modeling.